digital divider
英 [ˈdɪdʒɪtl dɪˈvaɪdə(r)]
美 [ˈdɪdʒɪtl dɪˈvaɪdər]
数字除法器
双语例句
- The comparison of digital frequency divider and traditional analog frequency divider shows that the former is more superadded.
比较了数字分频器与传统模拟分频器，说明数字分频器更具优点。 - A 10ps skew pure digital clock divider
一种10ps以下时钟偏差的纯数字电路分频器设计 - A Digital Type Divider and Its Applications
数字式分频器及其应用 - The high-speed electric signals at internal points in the high-speed GaAs digital integrated circuit-dynamic frequency divider were measured.
利用该系统在片检测了GaAs高速数字集成电路动态分频器内部的高速电信号。 - Based on microcomputer, a design thought of PC's digital and Programmable frequency divider card is put forward and a design way of hardwares and softwares is set. The PC's digital and programmable frequency divider card is designed and accomplished by applying the thought and method.
本文以微型计算机为基础，提出了基于PC机的数字程控分频器卡的设计思想，阐述了硬件、软件设计的具体方法，应用这一思想和方法设计并实现了基于PC机的数字程控分频器卡。 - The paper introduces a method of digital electronic clock design based on EWB and the system is made up by silicon crystal oscillator, frequency divider, number counter, decoder circuit, LED display circuit, calibrated circuit, chirping circuit.
介绍了一种基于EWB软件设计电子钟的方法，系统由石英晶体振荡器、分频器、计数器、译码电路、LED显示电路、校时电路、整点报时电路组成。 - A research and design of digital and programmable frequency divider card based on PC
基于PC机的数字程控分频器卡的研究与设计 - In digital circuit design, we always encounter the frequency-divider scheme.
在数字电路设计中，经常会遇到分频器的设计问题。 - Review on digital synchronous machine and element used in digital divider and translator circuit
数字同步机和数字分解器变换器电路器件概述 - In the end, the phase noise performance of subharmonic sampling phase-locked loop and digital PLL using frequency divider are analyzed and compared. The result shows that the former has more superior phase noise performance if both of the PLLs use the same reference and VCO.
最后分析和比较了分谐波采样式锁相环和分频式锁相环的相位噪声性能，得出了在相同的参考源和压控振荡器条件下，前者的相位噪声性能更优的结论。 - Applications of digital system design about LPM database 、 divider and DDS frequency synthesizer in the MAX+ PLUS ⅱ are introduced.
介绍了MAX+PLUSⅡ中LPM库车RAM、除法器和DDS频率合成器上进行数字系统设计的应用。 - The working process of typical N Digital fractional frequency divider is introduced and the integration function performed by cascaded accumulators is analyzed.
介绍了典型N数字小数分频器的工作过程，在此基础上分析了由级联累加器实现的积分功能。 - Design of sixteen bits digital frequency divider based on FPGA
基于FPGA技术的16位数字分频器的设计 - GaAs full Ion Implantation and Refractory Gate Planar Process and GaAs Digital Divider
GaAs高温栅全离子注入平面工艺及GaAs数字二分频器 - The Measurement Study of Frequency Division Modulus of Digital Frequency Divider
数字分频器分频模数测量方法的研究 - In this paper we present the principle of a digital divider with ratio of decimal fraction and structure of the circuit then we analysis the intrinsic jitter of the device Digital FIGURE
提出了一种具有小数分频比的数字分频器的设计原理，具体给出了这种分频器的电路结构，并对这种数字分频器的抖动性能进行分析和计算 - Analysis of frequency divider type, considering the low power consumption, the function design and other factors, no longer choose the traditional digital logic structure dual modulus divider, but switched to more advanced phase conversion type dual modulus divider.
分析分频器类型，综合考虑低功耗，功能设计等多方面因素，不再选取传统的数字逻辑结构双模分频器，而是改用更为先进的相位转换型双模分频器。 - The digital part includes closed loop oscillator, frequency divider, combinational logic circuit, non-overlapping clock generation circuit.
数字部分包含环形振荡器、分频器、组合逻辑门、非交叠时钟产生电路。 - In this phase control, the phase shift is controlled by direct digital synthesizer ( DDS) at low frequency. So it is easy to implement with high precision and low cost, and the MMW phase shifter and power divider are omitted.
该方案采用直接数字频率合成（DDS）在低频控制移相，具有技术难度小、精度高、控制方便等优点，避免了使用毫米波移相器和功率分配网络。 - Use a binary digital shifter replace the traditional divider in ADPLL, make the structure simple and keeps the loop gain constant when the frequency multiplication factor changes.
采用数字移位器替代传统的除法器，使得电路结构大大简化，而且在很大的倍频系数范围内都保持很好的稳定性。